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Paolo Paletti

Paolo Paletti

Email: ppaletti@nd.edu

Phone: 574-631-1103

Office: 228 Stinson-Remick Hall

Education

M.Sc. Electrical Engineering, University of Notre Dame, 2016

M.Sc. Electronics Engineering, University of Pisa, 2013

Biography

Paolo received his M.Sc. in Electronics Engineering from University of Pisa, Italy in 2013. After graduation, he spent one year as a research assistant within the Nanoscale Device Simulation Laboratory at the same institution. He is now a graduate student in electrical engineering at the University of Notre Dame, working on tunneling phenomena in 2D semiconductors. 

Summary of Activities/Interests

His research interests include the development of novel energy-efficient devices based on low-dimensional materials.


Publications

[9] H. Lu, P. Paletti, W. Li, Y. Lu, P. Fay, T. Ytterdal, A. Seabaugh, "Tunnel FET Analog Benchmarking and Circuit Design" (under review JxCDC), 2017.

[8] R. Yue, P. Paletti, Y. Nie, L.A. Walsh, L. Liu, M. Asghari Heidarlou, R. Addou, C. Smyth, A.T. Barton, J. Kim, L. Colombo, R.M. Wallace, K. Cho, A. Seabaugh, and C.L. Hinkle"High Hole Mobility, Back-End-of-Line Compatible WSe2 FETs Grown by MBE on ALD Oxides". 48th Semiconductor Interface Specialist Conference (SISC), 2017, IEEE. 

[7] S. Fathipour, H. Li, P. Paletti, M. Remskar, S. Fullerton-Shirey, and A. Seabaugh, A. "First synthesized WS2 nanotube and nanoribbon field effect transistors grown by chemical vapor transport". Device Research Conference (DRC), 75th Annual, 2017, IEEE.

[6] Convertino, D. Cutaia, H. Schmid, N. Bologna, P. Paletti, A.M. Ionescu, H. Riel and K. E. Moselund. "Investigation of InAs/GaSb tunnel diodes on SOI". EUROSOI ULIS, 2017.

[5] A. Seabaugh, C. Alessandri, M. Asghari Heidarlou, H. Li, L. Liu, H. Lu, S. Fathipour, P. Paletti, P. Pandey, T. Ytterdal. "Steep slope transistors: Tunnel FETs and beyond". Solid-State Device Research Conference (ESSDERC), 46th European, 2016, IEEE.

[4] S. Fathipour, P. Paletti, S. Fullerton, A. Seabaugh. "Demonstration of Electric Double-Layer p-i-n Junction in WSe2". Device Research Conference (DRC), 74th Annual, 2016, IEEE.

[3] P. Paletti, R. Pawar, G. Ulisse, F. Brunetti, G. Iannaccone, G. Fiori, "Can graphene outperform indium tin oxide as transparent electrode in organic solar cells?". 2D Materials, 2.4 (2015):045006.

[2] P. Paletti, R. Pawar, G. Ulisse, F. Brunetti, G. Iannaccone, G. Fiori, "Simulation of organic solar cells with graphene transparent electrode". International Workshop on Computational Electronics (IWCE), 2015, IEEE.

[1] G. Fiori, P. Paletti, R. Pawar, G. Ulisse, F. Brunetti, G. Iannaccone, "Improving the efficiency of organic solar cells with graphene transparent electrode and light management: a simulation study". 15th Conference on Nanotechnology, 2015, IEEE.

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